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general description the max15041 low-cost, synchronous dc-dc convert- er with internal switches delivers an output current up to 3a. the max15041 operates from an input voltage of 4.5v to 28v and provides an adjustable output voltage from 0.6v to 90% of v in , set with two external resistors. the max15041 is ideal for distributed power systems, preregulation, set-top boxes, television, and other con- sumer applications. the max15041 features a peak-current-mode pwm con- troller with internally fixed 350khz switching frequency and a 90% maximum duty cycle. the current-mode con- trol architecture simplifies compensation design, and ensures a cycle-by-cycle current limit and fast response to line and load transients. a high-gain transconductance error amplifier allows flexibility in setting the external com- pensation by using a type ii compensation scheme, thereby allowing the use of all ceramic capacitors. this synchronous buck regulator features internal mosfets that provide better efficiency than asynchro- nous solutions, while simplifying the design relative to discrete controller solutions. in addition to simplifying the design, the integrated mosfets minimize emi, reduce board space, and provide higher reliability by minimizing the number of external components. the max15041 also features thermal shutdown and overcurrent protection (high-side sourcing and low-side sinking), and an internal 5v ldo with undervoltage lockout. in addition, this device ensures safe startup when powering into a prebiased output. other features include an externally adjustable soft-start that gradually ramps up the output voltage and reduces inrush current. independent enable control and power- good signals allow for flexible power sequencing. the max15041 is available in a space-saving, high- power, 3mm x 3mm, 16-pin tqfn-ep package and is fully specified from -40c to +85c. applications distributed power systems wall adapters preregulators set-top boxes televisions xdsl modems consumer products features up to 3a of continuous output current ?% output accuracy over temperature 4.5v to 28v input voltage range adjustable output voltage range from 0.606v to 0.9 x v in internal 170m ? r ds-on high-side and 105m ? r ds-on low-side power switches fixed 350khz switching frequency up to 93% efficiency cycle-by-cycle overcurrent protection programmable soft-start stable with low-esr ceramic output capacitors safe startup into prebiased output enable input and power-good output fully protected against overcurrent and overtemperature v dd ldo undervoltage lockout space-saving, thermally enhanced, 3mm x 3mm package max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches ________________________________________________________________ maxim integrated products 1 max15041 in input 12v bst output 1.8v at 3a lx pgnd fb comp en v dd pgood pgood ss sgnd typical operating circuit ordering information 19-4815; rev 3; 3/11 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available part temp range pin- package top mark max15041ete+ -40c to +85c 16 tqfn-ep* agv + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad.
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (v in = 12v, c vdd = 1f, c in = 22f, t a = t j = -40c to +85c, typical values are at t a = +25c, unless otherwise noted.) (note 3) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. note 1: lx has internal clamp diodes to pgnd and in. applications that forward bias these diodes should take care not to exceed the ics package power dissipation. in to sgnd.............................................................-0.3v to +30v en to sgnd .................................................-0.3v to (v in + 0.3v) lx to pgnd ................................-0.3v to min (+30v, v in + 0.3v) lx to pgnd .....................-1v to min (+30v, v in + 0.3v) for 50ns pgood to sgnd .....................................................-0.3v to +6v v dd to sgnd............................................................-0.3v to +6v comp, fb, ss to sgnd..............-0.3v to min (+6v, v dd + 0.3v) bst to lx .................................................................-0.3v to +6v bst to sgnd .........................................................-0.3v to +36v sgnd to pgnd ....................................................-0.3v to +0.3v lx current (note 1) ....................................................-5a to +8a converter output short-circuit duration ...................continuous continuous power dissipation (t a = +70c) 16-pin tqfn (derate 14.7mw/c above +70c) multilayer board .........................................................1666mw operating temperature range ..........................-40c to +85c junction temperature .....................................................+150c storage temperature range ............................-65c to +150c lead temperature (soldering, 10s) .................................+300c soldering temperature (reflow) .......................................+260c parameter symbol conditions min typ max units step-down converter input-voltage range v in 4.5 28 v quiescent current i in not switching 2.1 4 ma v en = 0v, v dd regulated by internal ldo 212 shutdown input supply current v en = 0v, v in = v dd = 5v 18 28 a enable input en shutdown threshold voltage v en_shdn v en rising 1.4 v en shutdown voltage hysteresis v en_hyst 100 mv v en_lock v en rising 1.7 1.95 2.15 v en lockout threshold voltage v en_lock_hyst 100 mv en input current i en v en = 2.9v 2 5.3 9 a power-good output pgood threshold v pgood_th v fb rising 540 560 584 mv pgood threshold hysteresis v pgood_hyst 15 mv pgood output low voltage v pgood_ol i pgood = 5ma, v fb = 0.5v 35 100 mv pgood leakage current i pgood v pgood = 5v, v fb = 0.7v 10 na error amplifier error amplifier transconductance g mv 1.6 ms error amplifier voltage gain a vea 90 db fb set-point accuracy v fb 600 606 612 mv package thermal characteristics (note 2) note 2: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial . 16 tqfn-ep junction-to-ambient thermal resistance ( ja ).........+48c/w junction-to-case thermal resistance ( jc ) ...............+7c/w
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches _______________________________________________________________________________________ 3 note 3: specifications are 100% production tested at t a = +25c. limits over the operating temperature range are guaranteed by design and characterization. parameter symbol conditions min typ max units v fb = 0.5v -100 +100 fb input bias current i fb v fb = 0.7v -100 +100 na ss current i ss v ss = 0.45v, sourcing 4.5 5 5.5 a ss discharge resistance r ss i ss = 10ma, sinking, v en = 1.6v 6 ? ss prebiased mode stop voltage 0.65 v current sense to comp transconductance g mod 9s comp clamp low v fb = 0.7v 0.68 v pwm compensation ramp valley 830 mv pwm clock switching frequency f sw 315 350 385 khz maximum duty cycle d 90 % minimum controllable on-time 150 ns internal ldo output (v dd ) v dd output voltage v dd i vdd = 1ma to 25ma, v in = 6.5v 4.75 5.1 5.5 v v dd short-circuit current v in = 6.5v 30 80 ma ldo dropout voltage i vdd = 25ma, v dd drops by -2% 250 600 mv v dd undervoltage lockout threshold v uvlo_th v dd rising 4 4.25 v v dd undervoltage lockout hysteresis v uvlo_hyst 150 mv power switch high-side switch, i lx = 1a 170 305 lx on-resistance low-side switch, i lx = 1a 105 175 m ? high-side switch source current-limit threshold 5 6 7.2 a low-side switch sink current-limit threshold -3 a v bst = 33v, v in = v lx = 28v 10 lx leakage current v bst = 5v, v in = 28v, v lx = 0v 10 na bst leakage current v bst = 33v, v in = v lx = 28v 10 na thermal shutdown thermal-shutdown threshold rising +155 c thermal-shutdown hysteresis 20 c hiccup protection blanking time 16 x soft- start time electrical characteristics (continued) (v in = 12v, c vdd = 1f, c in = 22f, t a = t j = -40c to +85c, typical values are at t a = +25c, unless otherwise noted.) (note 3)
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches 4 _______________________________________________________________________________________ efficiency vs. load current max15041 toc01 load current (a) efficiency (%) 2.5 2.0 1.5 1.0 0.5 55 60 65 70 75 80 85 90 95 100 50 03.0 v out = 5.0v v out = 3.3v v out = 2.5v v out = 1.8v v out = 1.2v v in = 12v efficiency vs. load current max15041 toc02 load current (a) efficiency (%) 2.5 2.0 1.5 1.0 0.5 55 60 65 70 75 80 85 90 95 100 50 0 3.0 v out = 3.3v v out = 2.5v v out = 1.8v v out = 1.2v v in = 5v output-voltage regulation vs. load current max15041 toc03 load current (a) output-voltage regulation (%) 2.5 2.0 1.5 1.0 0.5 -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 -1.2 0 3.0 load-transient waveforms max15041 toc04 v out ac-coupled 200mv/div i load 2a/div v pgood 5v/div 200 s/div normalized output voltage vs. temperature temperature ( n c) normalized output voltage 60 35 10 -15 0.996 0.997 0.998 0.999 1.000 1.001 1.002 0.995 -40 85 max15041 toc05 i load = 0a normalized output voltage vs. temperature max15041 toc06 temperature ( n c) normalized output voltage 60 35 10 -15 0.994 0.996 0.998 1.000 1.002 1.004 0.992 -40 85 i load = 2a typical operating characteristics (v in = 12v, v out = 3.3v, c vdd = 1f, c in = 22f, t a = +25c, circuit of figure 3 (see table 1 for values), unless otherwise specified.) fb set point vs.temperature max15041 toc07 temperature ( n c) fb set point (mv) 60 35 10 -15 602 604 606 608 610 600 -40 85 switching frequency vs. input voltage max15041 toc08 input voltage (v) frequency (khz) 325 335 345 355 365 375 385 315 25 20 15 10 5 0 t a = +85 n c t a = +25 n c t a = -40 n c
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches _______________________________________________________________________________________ 5 input supply current vs. input voltage max15041 toc09 input voltage (v) input supply current (ma) 25 20 15 10 5 11 12 13 14 15 16 10 0 l = 4.7 f h i load = 0a shutdown current vs. input voltage max15041 toc10 input voltage (v) shutdown current ( f a) 1 2 3 4 5 6 7 8 9 10 0 25 20 15 10 5 0 shutdown current vs. temperature max15041 toc11 temperature ( n c) shutdown current ( f a) 60 35 10 -15 1.5 2.0 2.5 3.0 3.5 4.0 1.0 -40 85 shutdown waveforms max15041 toc12 v out 2v/div v en 5v/div i l 2a/div v pgood 5v/div 100 s/div output short-circuit waveforms max15041 toc13 i in 5a/div v out 2v/div i l 5a/div v ss 2v/div 10ms/div switching waveforms max15041 toc14 i l 2a/div v lx 10v/div v out ac-coupled 50mv/div 1 s/div typical operating characteristics (continued) (v in = 12v, v out = 3.3v, c vdd = 1f, c in = 22f, t a = +25c, circuit of figure 3 (see table 1 for values), unless otherwise specified.) soft-start waveforms max15041 toc15 i l 2a/div v en 5v/div v out 2v/div v pgood 5v/div 400 s/div
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches 6 _______________________________________________________________________________________ startup into prebiased output max15041 toc17 i l 2a/div v en 5v/div v out 2v/div i out 2a/div 400 s/div startup into prebiased output max15041 toc18 i l 5a/div v en 5v/div v out 2v/div i out 5a/div 400 s/div maximum load current vs. ambient temperature max15041 toc19 ambient temperature ( n c) maximum load current (a) 75 65 55 45 35 25 15 2.2 2.4 2.6 2.8 3.0 3.2 2.0 585 v in = 5v t j p + 150 n c v out = 1.8v v out = 2.5v v out = 3.3v v out = 1.2v typical operating characteristics (continued) (v in = 12v, v out = 3.3v, c vdd = 1f, c in = 22f, t a = +25c, circuit of figure 3 (see table 1 for values), unless otherwise specified.) soft-start time vs. capacitance max15041 toc16 c ss (nf) soft-start time (ms) 100 10 1 10 100 1000 0.1 1 1000
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches _______________________________________________________________________________________ 7 device power dissipation vs. load current max15041 toc22 load current (a) power dissipation (w) 2.5 2.0 1.5 1.0 0.5 0.5 1.0 1.5 2.0 2.5 3.0 0 03.0 v out = 3.3v v out = 2.5v v out = 1.8v v out = 1.2v v in = 12v device power dissipation vs. load current max15041 toc23 load current (a) power dissipation (w) 2.5 2.0 1.5 1.0 0.5 0.5 1.0 1.5 2.0 2.5 3.0 0 0 3.0 v out = 3.3v v out = 2.5v v out = 1.8v v out = 1.2v v in = 5v maximum load current vs. ambient temperature max15041 toc20 ambient temperature ( n c) maximum load current (a) 75 65 55 45 35 25 15 2.2 2.4 2.6 2.8 3.0 3.2 2.0 585 v in = 12v t j p + 150 n c v out = 1.2v v out = 1.8v v out = 2.5v v out = 3.3v maximum load current vs. ambient temperature max15041 toc21 ambient temperature ( n c) maximum load current (a) 75 65 55 45 35 25 15 2.2 2.4 2.6 2.8 3.0 3.2 2.0 585 v in = 28v t j p + 150 n c v out = 1.8v v out = 2.5v v out = 3.3v v out = 1.2v typical operating characteristics (continued) (v in = 12v, v out = 3.3v, c vdd = 1f, c in = 22f, t a = +25c, circuit of figure 3 (see table 1 for values), unless otherwise specified.)
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches 8 _______________________________________________________________________________________ pin description pin name function 1v dd internal ldo 5v output. supply input for the internal analog core. bypass with a ceramic capacitor of at least 1f to sgnd. see figure 3. 2 pgood power-good open-drain output. pgood goes low if fb is below 545mv. 3en enable input. en is a digital input that turns the regulator on and off. drive en high to turn on the regulator. connect to in for always-on operations. 4 comp voltage error-amplifier output. connect the necessary compensation network from comp to sgnd. 5fb feedback input. connect fb to the center tap of an external resistor-divider from the output to sgnd to set the output voltage from 0.606v to 90% of v in . 6ss soft-start input. connect a capacitor from ss to sgnd to set the soft-start time (see the setting the soft- start time section). 7 sgnd analog ground. connect to pgnd plane at one point near the input bypass capacitor return terminal. 8 i.c. internally connected. connect to sgnd. 9 bst high-side mosfet driver supply. bypass bst to lx with a 10nf capacitor. connect an external diode (see the diode selection section) from v dd to bst. 10, 11, 12 lx inductor connection. connect the lx pin to the switched side of the inductor. lx is high impedance when the ic is in shutdown mode, thermal shutdown mode, or v dd is below the uvlo threshold. 13, 14 pgnd power ground. connect to the sgnd pcb copper plane at one point near the input bypass capacitor return terminal. 15, 16 in input power supply. input supply range is from 4.5v to 28v. bypass with a ceramic capacitor of at least 22f to pgnd. ep exposed pad. connect to sgnd externally. solder the exposed pad to a large contiguous copper plane to maximize thermal performance. 15 16 14 13 *exposed pad, connect to sgnd. *ep 6 5 7 pgood comp 8 v dd lx bst lx 12 pgnd 4 12 11 9 in in + i.c. sgnd ss fb max15041 en lx 3 10 pgnd tqfn top view pin configuration
max15041 simplified block diagram enable control and thermal shutdown control logic and sink limit 5v ldo uvlo comparator current-sense/current-limit amplifier 4v v dd lx v dd bias generator 0.65v en voltage reference strong prebias comparator pwm comparator error amplifier oscillator max15041 n n pgnd lx in bst v dd pgood 0.606v 5 a 0.560v rising, 0.545v falling power-good comparator n ss fb ss comp sgnd low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches _______________________________________________________________________________________ 9
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches 10 ______________________________________________________________________________________ detailed description the max15041 is a high-efficiency, peak-current- mode, step-down dc-dc converter with integrated high-side (170m ? , typ) and low-side (105m ? , typ) power switches. the output voltage is set from 0.606v to 0.9 x v in by using an adjustable, external resistive divider and can deliver up to 3a load current. the 4.5v to 28v input voltage range makes the device ideal for distributed power systems, notebook computers, and preregulation applications. the max15041 features a pwm, internally fixed 350khz switching frequency with a 90% maximum duty cycle. pwm current-mode control allows for an all-ceramic capacitor solution. the max15041 comes with a high- gain transconductance error amplifier. the current- mode control architecture simplifies compensation design and ensures a cycle-by-cycle current limit and fast reaction to line and load transients. the low r ds-on , on-chip, mosfet switches ensure high effi- ciency at heavy loads and minimize critical induc- tances, reducing layout sensitivity. the max15041 also features thermal shutdown and overcurrent protection (high-side sourcing and low-side sinking), and an internal 5v, ldo with undervoltage lockout. an externally adjustable voltage soft-start gradually ramps up the output voltage and reduces inrush current. independent enable control and power- good signals allow for flexible power sequencing. the max15041 also provides the ability to start up into a prebiased output, below or above the set point. controller function?wm logic the max15041 operates at a constant 350khz switch- ing frequency. when en is high, after a brief settling time, pwm operation starts when v ss crosses the fb voltage, at the beginning of soft-start. the first operation is always a high-side mosfet turn- on, at the beginning of the clock cycle. the high-side mosfet is turned off when: 1) comp voltage crosses the internal current-mode ramp waveform, which is the sum of the compensa- tion ramp and the current-mode ramp derived from the inductor current waveform (current-sense block). 2) the high-side mosfet current limit is reached. 3) the maximum duty cycle of 90% is reached. then, the low-side mosfet turns on; the low-side mosfet turns off when the clock period ends. starting into a prebiased output the max15041 is capable of safely soft-starting into a prebiased output without discharging the output capacitor. starting up into a prebiased condition, both low-side and high-side mosfets remain off to avoid discharging the prebiased output. pwm operation starts only when the ss voltage crosses the fb voltage. the max15041 is also capable of soft-starting into an output prebiased above the out nominal set point. in this case, forced pwm operation starts when ss volt- age reaches 0.65v (typ). in case of a prebiased output, below or above the out nominal set point, if the low-side mosfet sink current reaches the sink current limit (-3a, typ), the low-side mosfet turns off before the end of the clock period and the high-side mosfet turns on until one of the fol- lowing conditions happens: 1) high-side mosfet source current hits the reduced high-side mosfet current limit (0.75a, typ); in this case, the high-side mosfet is turned off for the remaining clock period. 2) the clock period ends. enable input and power-good output the max15041 features independent device enable control and power-good signals that allow for flexible power sequencing. the enable input (en) is an input with a 1.95v (typ) threshold that controls the regulator. assert a voltage exceeding the threshold on en to enable the regulator, or connect en to in for always-on operations. power-good (pgood) is an open-drain output that deasserts (goes high impedance) when v fb is above 560mv (typ), and asserts low if v fb is below 545mv (typ). when the en voltage is higher than 1.4v (typ) and lower than 1.95v (typ), most of the internal blocks are disabled, only an internal coarse preregulator, includ- ing the en accurate comparator, is kept on.
max15041 programmable soft-start (ss) the max15041 utilizes a soft-start feature to slowly ramp up the regulated output voltage to reduce input inrush current during startup. connect a capacitor from ss to sgnd to set the startup time (see the setting the soft- start time section for capacitor selection details ) . internal ldo (v dd ) the max15041 has an internal 5.1v (typ) ldo. v dd is externally compensated with a minimum 1f, low-esr ceramic capacitor. the v dd voltage is used to supply the low-side mosfet driver, and to supply the internal control logic. when the input supply (in) is below 4.5v, v dd is 50mv (typ) lower than in. the v dd output cur- rent limit is 80ma (typ) and an uvlo circuit inhibits switching when v dd falls below 3.85v (typ). error amplifier a high-gain error amplifier provides accuracy for the volt- age feedback loop regulation. connect the necessary compensation network between comp and sgnd (see the compensation design guidelines section). the error- amplifier transconductance is 1.6ms (typ). comp clamp low is set to 0.68v (typ), just below the pwm ramp com- pensation valley, helping comp to rapidly return to cor- rect set point during load and line transients. pwm comparator the pwm comparator compares comp voltage to the current-derived ramp waveform (lx current to comp volt- age transconductance value is 9a/v, typ.). to avoid insta- bility due to subharmonic oscillations when the duty cycle is around 50% or higher, a compensation ramp is added to the current-derived ramp waveform. the compensation ramp slope (0.45v x 350khz) is equivalent to half of the inductor current down slope in the worst case (load 3a, current ripple 30% and maximum duty cycle operation of 90%). compensation ramp valley is set at 0.83v (typ). overcurrent protection and hiccup mode when the converter output is shorted or the device is overloaded, the high-side mosfet current-limit event (6a, typ) turns off the high-side mosfet and turns on the low-side mosfet. in addition, it discharges the ss capacitor, c ss for a fixed period of time ( ? t 0 = 70ns, typ). if the overcurrent condition persists, ss is pulled below 0.606v and a hiccup event is triggered. during a hiccup event, high-side and low-side mosfets are kept off, and comp is pulled low for a period equal to 16 times the nominal soft-start time (blanking time). this is obtained by charging ss from 0 to 0.606v with a 5a (typ) current, and then slowly dis- charging it back to 0v with a 333na (typ) current. after the blanking time has elapsed, the device attempts to restart. if the overcurrent fault has cleared, the device resumes normal operation, otherwise a new hiccup event is triggered (see the output short-circuit waveforms in the typical operating characteristics ). thermal-shutdown protection the max15041 contains an internal thermal sensor that limits the total power dissipation in the device and pro- tects it in the event of an extended thermal fault condi- tion. when the die temperature exceeds +155c (typ), the thermal sensor shuts down the device, turning off the dc-dc converter and the ldo regulator to allow the die to cool. after the die temperature falls by 20c (typ), the device restarts, using the soft-start sequence. applications information setting the output voltage connect a resistive divider (r 1 and r 2 , see figures 1 and 3) from out to fb to sgnd to set the dc-dc con- verter output voltage. choose r 1 and r 2 so that the dc errors due to the fb input bias current do not affect the output-voltage precision. with lower value resistors, the dc error is reduced, but the amount of power consumed in the resistive divider increases. a typical tradeoff value for r 2 is 10k ? , but values between 5k ? and 50k ? are acceptable. once r 2 is chosen, calculate r 1 using: where the feedback threshold voltage v fb = 0.606v (typ). rr v v out fb 12 1 = ? ? ? ? ? ? ? low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches ______________________________________________________________________________________ 11
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches 12 ______________________________________________________________________________________ inductor selection a larger inductor value results in reduced inductor ripple current, leading to a reduced output ripple voltage. however, a larger inductor value results in either a larger physical size or a higher series resistance (dcr) and a lower saturation current rating. typically, inductor value is chosen to have current ripple equal to 30% of load current. choose the inductor with the following formula: where f sw is the internally fixed 350khz switching fre- quency, and ? i l is the estimated inductor ripple current (typically set to 0.3 x i load ). in addition, the peak inductor current, i l_pk, must always be below both the minimum high-side mosfet current-limit value, i hscl_min (5a, typ), and the inductor saturation current rating, i l_sat . ensure that the following relationship is satisfied: diode selection the max15041 requires an external bootstrap steering diode. connect the diode between v dd and bst. the diode should have a reverse voltage rating, higher than the converter input voltage and a 150ma minimum cur- rent rating. typically, a fast switching or schottky diode is used in this application, such as a 1n4148 diode. input capacitor selection for a step-down converter, input capacitor c in helps to keep the dc input voltage steady, in spite of discontin- uous input ac current. low-esr capacitors are pre- ferred to minimize the voltage ripple due to esr. size c in using the following formula: output-capacitor selection low-esr capacitors are recommended to minimize the voltage ripple due to esr. total output-voltage peak-to- peak ripple is estimated by the following formula: for ceramic capacitors, esr contribution is negligible: for tantalum or electrolytic capacitors, esr contribution is dominant: compensation design guidelines the max15041 uses a fixed-frequency, peak-current- mode control scheme to provide easy compensation and fast transient response. the inductor peak current is monitored on a cycle-by-cycle basis and compared to the comp voltage (output of the voltage error amplifier). the regulators duty-cycle is modulated based on the inductors peak current value. this cycle-by-cycle con- trol of the inductor current emulates a controlled current source. as a result, the inductors pole frequency is shifted beyond the gain-bandwidth of the regulator. system stability is provided with the addition of a sim- ple series capacitor-resistor from comp to sgnd. this pole-zero combination serves to tailor the desired response of the closed-loop system. the basic regulator loop consists of a power modulator (comprising the regulators pulse-width modulator, compensation ramp, control circuitry, mosfets, and inductor), the capacitive output filter and load, an out- put feedback divider, and a voltage-loop error amplifier with its associated compensation circuitry. see figure 1 for a graphical representation. the average current through the inductor is expressed as: where i l is the average inductor current and g mod is the power modulators transconductance. for a buck converter: where r load is the equivalent load resistor value. combining the two previous equations, the power mod- ulators transfer function in terms of v out with respect to v comp is: v v ri i g rg out comp load l l mod load mod = ? ? ? ? ? ? = vr i out load l = ig v lmodcomp = r fc esr cout sw out _ >> 1 8 r fc esr cout sw out _ << 1 8 ? v v fl v v r out out sw out in esr cout = ? ? ? ? ? ? ? + 1 1 _ 8 8 ? ? ? ? ? ? fc sw out c i fv v v in load sw in ripple out in = ? _ ii ii i l pk load l hscl min l sat ___ min( , ) =+< 1 2 ? l v fi v v out sw l out in = ? ? ? ? ? ? ? ? 1
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches ______________________________________________________________________________________ 13 having defined the power modulators transfer function gain, the total system loop gain can be written as fol- lows (see figure 1): where r out is the quotient of the error amplifiers dc gain, a vea , divided by the error amplifiers transcon- ductance, g mv ; r out is much larger than r c and c c is much larger than c cc . rewriting: the dominate poles and zeros of the transfer loop gain is shown below: the order of pole-zero occurrence is: note under heavy load, f p2 , may approach f z1 . a graphical representation of the asymptotic system closed-loop response, including the dominant pole and zero locations is shown in figure 2. ff ff f pp zz p 12 12 3 <<< f g c f c esr p mv adb c p out vea 1 20 2 210 1 2 = = [] / + + () = = = r f cr f cr f load p cc c z cc z 31 2 1 2 1 2 1 2 2 c esr out gain v v a sc r sc a g fb out vea cc c vea mv = + () ? ? ? ? ? ? + 1 1 11 1 ? ? ? ? ? ? + () + () sc r gr sc esr cc c mod load out s sc esr r out load + () + ? ? ? ? 1 = + () + () + () + ? ? ? ? rscr sc c r r sc out c c ccccout 1 1 c ccccout mod load o crr gr sc || || ()( ) + ? ? ? ? = 1 u ut out load esr sc esr r gain r r + () + () + ? ? ? ? = 1 1 2 1 + + r a r vea out 2 l0 q hs control logic v comp v out pwm comparator comp r c r out g mv v in power modulator output filter and load note: the g mod stage shown above models the average current of the inductor injected into the output load. this represents a simplification for the power modulator stage drawn above. error amplifier feedback divider compensation ramp g mc dcr i l q ls v out v out i l esr c out r load c c ref *c cc is optional. r out = a vea /g mv *c cc fb r 1 r 2 g mod figure 1. peak current-mode regulator transfer model
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches 14 ______________________________________________________________________________________ if c out is large, or exhibits a lossy equivalent series resistance (large esr), the circuits second zero may come into play around the crossover frequency (f co = co /2 ). in this case, a third pole may be induced by a second (optional) small compensation capacitor (c cc ), connected from comp to sgnd. the loop responses fourth asymptote (in bold, figure 2) is the one of interest in establishing the desired crossover frequency (and determining the compensa- tion component values). a lower crossover frequency provides for stable closed-loop operation at the expense of a slower load and line transient response. increasing the crossover frequency improves the tran- sient response at the (potential) cost of system instabili- ty. a standard rule of thumb sets the crossover frequency 1/10 of the switching frequency (for the max15041, this is approximately 35khz for the 350khz fixed switching frequency). first, select the passive and active power components that meet the applications requirements. then, choose the small-signal compensation components to achieve the desired closed-loop frequency response and phase margin as outlined in the closing the loop: designing the compensation circuitry section. closing the loop: designing the compensation circuitry 1) select the desired crossover frequency. choose f co equal to 1/10 th of f sw , or f co 35khz. 2) select r c using the transfer-loops fourth asymptote gain (assuming f co > f p1 , f p2 , and f z1 and setting the overall loop gain to unity) as follows: therefore: r v v f c esr r gg c out fb co out load mv mod = + () 2 r r load 1 1 2 = v v grg r fc es fb out mv c mod load co out r rr load + () 1st asymptote v fb x v out -1 x 10 a vea [db]/20 x g mod x r load 2nd asymptote v fb x v out -1 x g mv x (c c ) -1 x g mod x r load 3rd asymptote v fb x v out -1 x g mv x (c c ) -1 x g mod x r load x ( c out (esr + r load )) -1 4th asymptote v fb x v out -1 x g mv x r c x g mod x r load x (c out (esr + r load )) -1 5th asymptote v fb x v out -1 x g mv x r c x g mod x (esr || r load ) 6th asymptote v fb x v out -1 x g mv x ( c cc ) -1 x g mod x (esr || r load ) unity gain rad/s 3rd pole (c cc r c ) -1 2nd zero (c out esr) -1 1st zero (c c r c ) -1 2nd pole (c out (esr + r load )) -1 1st pole g mv x (10 a vea [db]/20 c c ) -1 co figure 2. asymptotic loop response of peak current-mode regulator
max15041 for r load much greater than esr, the equation can be further simplified as follows: where v fb is equal to 0.606v. 3) select c c . c c is determined by selecting the desired first system zero, f z1 , based on the desired phase margin. typically, setting f z1 below 1/5th of f co provides sufficient phase margin. therefore: 4) if the esr output zero is located at less than one-half the switching frequency use the (optional) sec- ondary compensation capacitor, c cc , to cancel it, as follows: therefore: if the esr zero exceeds 1/2 the switching frequency, use the following equation: therefore: the downside of c cc is that it detracts from the overall system phase margin. care should be taken to guarantee this third-pole placement is well beyond the desired crossover frequency, minimizing its interaction with the system loop response at crossover. if c cc is smaller than 10pf, it can be neglected in these calculations. setting the soft-start time the soft-start feature ramps up the output voltage slow- ly, reducing input inrush current during startup. size the c ss capacitor to achieve the desired soft-start time t ss using: i ss , the soft-start current, is 5a (typ) and v fb , the out- put feedback voltage threshold, is 0.606v (typ). when using large c out capacitance values, the high-side current limit may trigger during the soft-start period. to ensure the correct soft-start time, t ss , choose c ss large enough to satisfy: i hscl_min is the minimum high-side switch, current- limit value. power dissipation the max15041 is available in a thermally enhanced tqfn package and can dissipate up to 1.666w at t a = +70c. the exposed pad should be connected to sgnd externally, preferably soldered to a large ground plane to maximize thermal performance. when the die temperature exceeds +155c, the thermal-shutdown protection is activated (see the thermal-shutdown protection section). layout procedure careful pcb layout is critical to achieve clean and sta- ble operation. it is highly recommended to duplicate the max15041 evaluation kit layout for optimum perfor- mance. if deviation is necessary, follow these guide- lines for good pcb layout: 1) connect input and output capacitors to the power ground plane; connect all other capacitors to the signal ground plane. cc vi iiv ss out out ss hscl min out fb >> ? () _ c it v ss ss ss fb = c fr cc sw c = 2 2 f cr f p cc c sw 3 1 22 = = c c esr r cc out c = 1 2 1 2 32 === cr ff c esr cc c pz out c fr c co c 5 2 f cr f z cc co 1 1 25 = r v v fc gg c out fb co out mv mod = 2 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches ______________________________________________________________________________________ 15
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches 16 ______________________________________________________________________________________ 2) place capacitors on v dd , in, and ss as close as possible to the ic and the corresponding pin using direct traces. keep the power ground plane (con- nected to pgnd) and signal ground plane (connect- ed to sgnd) separate. pgnd and sgnd connect at only one common point near the input bypass capacitor return terminal. 3) keep the high-current paths as short and wide as possible. keep the path of switching current short and minimize the loop area formed by lx, the output capacitors, and the input capacitors. 4) connect in, lx, and pgnd separately to a large copper area to help cool the ic to further improve efficiency. 5) ensure all feedback connections are short and direct. place the feedback resistors and compensa- tion components as close as possible to the ic. 6) route high-speed switching nodes (such as lx and bst) away from sensitive analog areas (such as fb and comp). max15041 in en l 4.7 h d r bst 47 ? input 4.5v to 28v bst output = 3.3v lx pgnd fb comp r pu 10k ? c vdd 1 f c bst 10nf c out 22 f r 1 45.3k ? 1% r 2 10.0k ? 1% r c 1.8k ? c c 12nf c cc 100pf c in 47 f c ss 0.01 f v dd pgood pgood ss i.c. sgnd v out (v) l (?) c c (nf) r c (k ? )r 1 and r 2 5.0 4.7 8 2.70 3.3 4.7 12 1.80 2.5 3.3 22 1.50 1.8 2.2 33 1.00 1.2 2.2 47 0.68 select r 2 so that: 5k ? r 2 50k ? calculate r 1 using the equation in the setting the output voltage section. figure 3. typical operating circuit (4.5v to 28v input buck converter) table 1. typical component values for common output-voltage settings
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches ______________________________________________________________________________________ 17 chip information process: bicmos package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 16 tqfn-ep t1633+4 21-0136 90-0031
max15041 low-cost, 3a, 4.5v to 28v input, 350khz, pwm step-down dc-dc regulator with internal switches maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 18 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 7/09 initial release 1 3/10 revised general description , absolute maximum ratings , electrical characteristics, applications information , figures 2 and 3 . 1, 2, 3, 8, 11C14, 16, 17 2 9/10 update electrical characteristics and package information 2, 17, 18 3 3/11 recommended new diode for boost 15

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